1. Field
Example embodiments relate to vertical memory devices and methods of manufacturing the same. More particularly, example embodiments relate to vertical memory devices having a vertical channel and methods of manufacturing the same.
2. Description of the Related Art
In methods of manufacturing vertical memory devices, an insulation layer and a sacrificial layer may be alternately and repeatedly formed on a substrate. Holes may be formed though the insulation layers and the sacrificial layers. Channels may be formed to fill the holes. Openings may be formed through the insulation layers and the sacrificial layers. The sacrificial layers exposed by the openings may be removed to form gaps exposing the channels. ONO layers and gate structures including gate electrodes may be formed to fill the gaps.
In order to increase the degree of integration, more channels may be disposed in a predetermined area. When the channels may be disposed adjacent to each other, voids may occur during a process for forming a gate electrode layer, and a space for receiving bit lines may be insufficient.